30 年来首个新 VAX? (2021)
First new VAX in 30 years? (2021)

原始链接: https://mail-index.netbsd.org/port-vax/2021/07/03/msg003899.html

为了回应之前的架构讨论,Anders Magnusson 开始探索,考虑到其简洁的设计和高效的指令集,是否有可能在三十年内实施第一台新型 VAX 计算机。 学习 Verilog 编程后,他使用包含小型低端 FPGA 的 15 年前的演示板成功实现了 VAX 硬件的一部分,包括寻址模式、中断层次结构、定时器以及 164 条指令中的 151 条指令。 当前迭代运行频率为 50 MHz,利用了大约 70% 的可用 FPGA 资源。 目前不包括内存管理; 然而,实施似乎很简单。 作者计划分享有关其工作的进一步更新。

根据给定的材料,本文与 VAX 和 HNP 相关的主题的简要概述可总结如下: 本文讨论了 rump 内核的构建以及将 netbsd 分发到其他平台(包括 vax)。 这引发了有关跨平台软件的可行性以及通用编程范例是否可以解决分布式处理中面临的问题的问题。 此外,文章还提到了作者在不同地区遇到的几个 vax 系统,强调了尽管其生产周期有限,但它们仍然具有相关性。 虽然没有直接提到 hnp 与所提到的 vax 的关系,但讨论表明 vax 在支持 netbsd 安装方面的潜在用途。 总的来说,本文强调需要创新的解决方案来克服分布式处理环境带来的挑战。
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原文
Port-vax archive

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  • To: port-vax List port-vax%NetBSD.org@localhost>
  • Subject: First new vax in ...30 years? :-)
  • From: Anders Magnusson ragge%tethuvudet.se@localhost>
  • Date: Sat, 3 Jul 2021 12:14:02 +0200

Hi,

some time ago I ended up in an architectural discussion (risc vs cisc etc...) and started to think about vax. Even though the vax is considered the "ultimate cisc" I wondered if its cleanliness and nice instruction set still could be implemented efficient enough. Well, the only way to know would be to try to implement it :-)  I had an 15-year-old demo board with a small low-end FPGA (Xilinx XC3S400), so I just had to learn Verilog and try to implement something.  And it just passed EVKAA.EXE:

>FR00000000 200
>G
EVKAA V10.4 Hardcore Instruction Test

Hit any key to continue
EVKAA   V10.4 pass # 1(X) done!
EVKAA   V10.4 pass # 19(X) done!
EVKAA   V10.4 pass # 32(X) done!
EVKAA   V10.4 pass # 4B(X) done!
EVKAA   V10.4 pass # 64(X) done!
EVKAA   V10.4 pass # 7D(X) done!
EVKAA   V10.4 pass # 96(X) done!
EVKAA   V10.4 pass # AF(X) done!
EVKAA   V10.4 pass # C8(X) done!
EVKAA   V10.4 pass # E1(X) done!^C
Input breakpoint: 000000001
>

(the microcode console works like the Nova4 microcode console - simpler to implement than the VAX style...) It runs at 50MHz, but could easily be increased to about 80, just to program DCM.

Photo of the "vax": https://www.ludd.ltu.se/~ragge/pics/IMG_0837.jpg
I had to get a new FPGA board, since I started to get bit errors on the old one, so I bought a chinese board with essentially the same FPGA (XC3S500E):

I have implemented all addressing modes, the interrupt hierarchy, timers, and 151 instructions.
No memory management yet though, but that should be quite straight-forward.

Currently it uses about 70% of available FPGA resources, which is around 6000 LUTs (which is quite inefficient implemented, since I have learned how to do verilog programming while writing the code...)

I'll follow up this mail with two more, one about the implementation and one about how to go forward with the vax architecture :-)

-- R


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