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Switzerland is fostering an open-source movement that frees universities and chip designers from the commercial shackles of monopolistic companies.
The frenetic rise of artificial intelligence has put hefty new demands on the semiconductor industry. Supercomputers and data centres are hungry for more advanced specialised chips.
This has given a boost to universities, like the Swiss federal institutes of technology, which are working to design next generation semiconductors. But the research and production of these chips is hampered by restrictions on what’s called ‘Instruction Set Architecture’ (ISA).
ISA are essentially translators that determine how chips interact with software. And the most common ISAs are controlled by the American company Intel and the British firm ARM. The companies charge fees to work within their ISA systems and restrict how they can be adapted for new chip designs.
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The answer to this dilemma is an open-source ISA called RISC-V, which was developed at the University of California, Berkeley, in 2010. The technology was transferred to a non-profit foundation in 2015, which moved from the United States to Zurich in 2020 as the RISC-V International Association.
‘Freedom to operate’ in semiconductor research
The Swiss federal technology institute ETH Zurich was a founding member of the association in 2015. The open-source alternative “creates an infrastructure to innovate,” according to Luca Benini, professor of the department of information technology and electrical engineering.
“Academics are essentially blocked from designing or adapting processors on proprietary ISAs,” he told Swissinfo. “You need explicit permission from the ISA owner. We moved to open-source ISA to give us freedom to operate.”
This has enabled ETH researchers to develop some 75 chips over the course of the last ten years. Switzerland does not compete head-to-head with countries like Taiwan, the United States and China, which have large chip manufacturing facilities. Instead, the Alpine nation focuses on niche areas, such as designing ultra-low-power semiconductors that use less energy.
“We have designed RISC-V processors specialised for machine learning and inference and for LLM training,” said Benini. “We have been able to demonstrate 100-fold efficiency gains, which is a once-in-a-generation improvement.”
This is imperative in an era when AI and expanding data centres are consuming more electricity. The semiconductor industry is “refining each part of the process, reducing unnecessary computation and optimising to be more energy efficient,” Alain-Serge Porret, vice-president, Integrated & Wireless Systems at the Swiss Technology Innovation Center (CSEM), wrote in a post in the Semiwiki website.
“Even leading companies that once championed aggressive scale are now looking how to properly size chips for the energy realities of today,” he added.
The public-private innovation agency CSEM was set up in the early 1980s by the Swiss government to collaborate between academic institutions and industry to ensure that Switzerland keeps pace with developments in technology.
The centre’s semiconductor research has flourished under the RISC-V umbrella. CSEM started developing processors with its own ISA but found the task of managing and maintaining the whole ecosystem time-consuming.
This requires a team of developers to keep the architecture updated and bug-free plus support services for companies applying the technology in their businesses.
Assigning this task to an open-source community has freed resources for research and innovation, said Stéphane Emery, head of CSEM’s system-on-a-chip group. RISC-V brings together more than 4,500 academic institutions and companies such as Google, Huawei, Siemens and Sony, under one roof.
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The group works together to maintain and strengthen the ISA by adding new applications and ratifying new extensions to the architecture.
“It is important for academic research because we can exchange ideas with other universities and companies worldwide. It’s a very active ecosystem that is constantly evolving,” he said.
Resources freed by open-source approach
CSEM has commercial links with several global brands, including a project to develop an ultra-low power chip for smartphones and tablets with the multinational United Semiconductor Japan (formerly known as Fujitsu).
The Swiss Federal Institute of Technology Lausanne (EPFL) has leveraged RISC-V for its own research projects as well. This includes the X-HEEP open-source microcontroller, which allows researchers to build and test energy-efficient embedded systems for ultra-low power edge computing, Internet of Things applications and biomedical wearables.
The open-source RISC-V ecosystem is vital for academic research institutions in Switzerland, according to Benini.
Benini compares it to CERN, where physicists can test their theories using the particle accelerator. “RISC-V plays a similar role as a research infrastructure for computing systems. It’s a very important asset that enables research in software and specialised hardware to reach the outside world in a concrete form,” he said.
Edited by Gabe Bullard/VdV